An Ultra-Low Phase Noise All-Digital Multi-Frequency Generator Using Injection-Locked DCOs and Time-Interleaved Calibration

 

ICSL’s paper (authors: Suneui Park, Heein Yoon, and Prof. Jaehyouk Choi) “An Ultra-Low Phase Noise All-Digital Multi-Frequency Generator Using Injection-Locked DCOs and Time-Interleaved Calibration” has been accepted for presentation at 2017 IEEE A-SSCC (Asian Solid-State Circuits Conference) in Seoul in coming November.

 

ASSCC is one of the most prestigious conferences in the field of intergrated circuit (IC) designs and also the largest IC conference held in Asia. Especially in this year, ASSCC is held in Korea in six years since 2011. In this work, they developed an all-digital frequency generator that could provide multiple output-frequencies at the same time. This circuit is expected to be used as a core building block for various applications, including low-power CPU and communication systems.

 

Authors: Suneui Park, Heein Yoon, and Jaehyouk Choi

Title: An Ultra-Low Phase Noise All-Digital Multi-Frequency Generator Using Injection-Locked DCOs and Time-Interleaved Calibration

Conference: 2017 IEEE Asian Solid-State Circuits Conference (A-SSCC)

Presentation date: Nov, 2017

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