CONTACT

[Tel] +82-42-350-7558
[Address]

Bldg. E3-2, Rm. 5214,

291, Daehak-ro, Yuseong-gu, Daejeon

34141, Republic of Korea

Mina Kim
School of Electrical & Computer Engineering, UNIST
Master

 

Contact Info.
Lab : UNIST EB3 603-2
Email : kimmina@unist.ac.kr
 
Education
2010 - 2013
B.S. in Electrical and Computer Engineering, summa cum laude
Ulsan National Institute of Science and Technology
 
2013 - 2016
M.S. in Electrical Engineering
Ulsan National Institute of Science and Technology
 
Publications
Y. Lee, H. Yoon, M. Kim, and J. Choi, "A PVT-Robust Low Reference Spur Injection-Locked Clock Multiplier Using a Voltage-Domain Period-Calibrating Loop", IEEE Symp. VLSI Circuits Dig., Jun. 2016.
 
M. Kim, S. Choi, and J. Choi, "A Low-Jitter and Fractional-Resolution Injection-Locked Clock Multiplier Using a DLL-Based Real-time PVT-Calibrator with Replica-Delay Cells," IEEE J. Solid-State Circuits, Oct. 2015., accepted for pulbication
 
M. Kim, S. Choi, and J. Choi, "A 450-fs jitter PVT robust fractional-resolution injection-locked clock multiplier using a DLL-based calibrator with replica-delay-cells", in IEEE Symp. VLSI Circuits DIg., Jun. 2015
 
Y. Lee, M. Kim, T. Seong and J. Choi, "A Low Phase Noise Injection-Locked Programmable Reference Clock Multiplier with a Two-Phase PVT-Calibrator for ΔΣ PLLs", IEEE Transactions on Circuits and Systems I (IEEE T-CAS I), Mar. 2015