CONTACT

[Tel] +82-42-350-7558
[Address]

Bldg. E3-2, Rm. 5214,

291, Daehak-ro, Yuseong-gu, Daejeon

34141, Republic of Korea

Yongwoo Jo
School of Electrical  Engineering, KAIST
Ph.D., 2020 - Present

Contact Information
Office : Engineering Bldg.3 603-2
Email : yongwoo.jo@kaist.ac.kr
Education
Mar. 2018 - 2020
M.S. in Electrical and Computer Engineering
Ulsan National Institute of Science and Technology.
Mar. 2014 - Feb. 2018
B.S. in Electrical and Computer Engineering
Ulsan National Institute of Science and Technology.
 
 
 
International Conferences
Y. Lim=, J. Kim=, Y. Jo, J. Bang, S. Yoo, H. Park, H. Yoon and J. Choi*, "A 170MHz-Lock-In-Range and -253dB-FOMJIT, 12-14.5GHz Subsampling PLL with ...," IEEE International Solid-State Circuits Conference (ISSCC), accepted for presentation, Feb. 2020. (= Equally-Credited Authors)
S. Choi, S. Yoo, Y. Lee, Y. Jo, J. Lee, Y. Lim, and J. Choi, "153 fsRMS-Integrated-Jitter and 114-Multiplication Factor PVT-Robust 22.8 GHz Ring-LC-Hybrid Injection-Locked Clock Multiplier," IEEE Symposium on VLSI Circuits Dig., Jun. 2018, accepted for presentation
  
Journals
 

S. Choi, S. Yoo, Y. Lee, Y. Jo, J. Lee, Y. Lim, and J. Choi*, "An Ultra-Low-Jitter 22.8-GHz Ring-LC-Hybrid Injection-Locked Clock Multiplier with a Multiplication Factor of 114," IEEE Journal of Solid-State Circuits, Apr. 2018, invited from IEEE 2018 Symp. VLSI Circuits.

 
Y. Lim, J. Lee, S. Park, Y. Jo, and J. Choi*, "An External Capacitorless Low-Dropout Regulator with High PSR at All Frequencies from 10 kHz to 1 GHz Using an Adaptive Supply-Ripple Cancellation Technique," IEEE Journal of Solid-State Circuits, Sep. 2018
 
Awards & Honors
 
19th Korea Semiconductor Design Competition, President of Semiconductor Association's Award, Oct. 2018
 
13th ASML Korea Semiconductor Scholarship, Oct. 2018